The present invention is an isolation method in a semiconductor device, particularly, a method for isolating active regions in a semiconductor device and minimizing the bird's beaks regions.
The trend in recent years is to achieve higher packing densities in semiconductor devices, thus increasing the demand to minimize device isolation regions. Also, as the rule for designing devices is reduced to sub-micron, greatly improved isolation techniques will be required.
In order to reduce bird's beak which occurs in the local oxidation of silicon (LOCOS) method (generally utilized as one of the isolation techniques), sealed interface local oxidation (SILO), poly-buffered LOCOS (PBL), etc., improvements to the LOCUS method have been suggested. However, the suggested improvements lower the breakdown voltage of the device, making it impossible to heavily dope impurities into a channel stop layer, which causes further problems such as punch-through and the like.
Therefore, several methods have been proposed to increase the impurity density of a channel stop layer. One method, framed mask poly-buffered LOCOS (FMPBL) as illustrated in FIGS. 1A through 1F, improves the conventional isolation methods.
Referring to FIG. 1A, pad oxide layer 2 about 150 .ANG. thick is grown on semiconductor substrate 1. Polysilicon layer 3 about 500 .ANG. thick and first silicon nitride layer 4 which is patterned for defining an active region by photolithographic method, are deposited thereon. Then, second silicon nitride layer 5 about 1000 .ANG. thick is deposited on the whole surface of the structure as shown in FIG. 1B.
Referring to FIG. 1C, second silicon nitride layer 5 is anisotropically etched, to form spacers 5a. Then, channel stop layer 6 is formed by ion implanting an impurity, using spacers 5a as a mask. Field oxide layer 7 about 6500 .ANG. thick is grown in a wet ambient at 1000.degree. C. as shown in FIG. 1D.
Referring to FIG. 1E, first silicon nitride layer 4 and polysilicon layer 3 are sequentially removed. The device isolation process is completed through an etch-back process as shown in FIG. 1F.
In this conventional device isolation method, second silicon nitride layer 5 needs to be thick in order to increase the distance between the spacers during their formation. The spacers are provided to prevent the lowering of the junction breakdown voltage and to reduce the punch-through effect. However, a thick second silicon nitride layer causes the first silicon nitride layer to be overetched during the anisotropic etching. This causes impurities to be implanted in the active region during the implantation stage adversely affecting the device. In addition, when the field oxide layer is grown, stress is imposed on field oxide layer 7 at the points where contact is made with the thick second silicon nitride layer 5 for forming the spacer. The stress-affected portion is dented by being etched too much during the etch-back process of field oxide layer 7, so that notches (bird's beaks) are produced in the photolithographic process.